Projects

Here is the list of the main national and international funded projects I actively contributed.

  • Active projects

H2020-FETHPC-671623-ANTAREX (2016-2019)
Title: AutoTuning and Adaptivity appRoach for Energy efficient eXascale HPC systems
Local project leader: Prof. Cristina Silvano (POLIMI)
Role: Co-applicant, Deputy Coordinator, Task Leader and Research Team Member
Activities: Development of a self-adaptive application-level framework for energy efficient execution in HPC platforms. The framework exploits autonomous and and approximate computing concepts by tuning application-level knobs according to dynamically changing functional and extra-functional requirements. He was co-applicant of the project.

 

  • Past Projects

FP7-ICT-611146-CONTREX  (2014-2017)
Title: Design of embedded mixed-criticality CONTRol systems under consider- ation of EXtra-functional properties
Local project leader: Prof. William Fornaciari (POLIMI)
Role: Co-applicant, Task Leader and Research Team Member
Activities: Design and implementation of (i) a multi-level design space exploration framework for real- time embedded system and (ii) an application-level run-time monitoring framework for the extra functional properties. He was co-applicant of the project.

FP7-ICT-247999-COMPLEX
Title: CO-design and power Management in PLatform-based design space Ex- ploration (IP Project)
Local project leader: Prof. William Fornaciari (POLIMI)
Role: Co-applicant, Task Leader and Research Team Member
Activities: Definition and implementation of power-aware methodologies in a model-driven HW/SW co-design flow based on the introduction of an automatic design space exploration engine.

FP7-ICT-248716-2PARMA
Title: PARallel PAradigms and Run-time MAnagement techniques for Many-core Architectures
Local project leader: Prof. Cristina Silvano (POLIMI) – Co-applicant of the Project
Role: Co-applicant and Research Team Member
Activities: Implementation of an application-specific run-time manager to support application adaptation on multi/many-core architectures. He was co-applicant of the project.

ARTEMIS-100230-SMECY
Title: Smart Multicore Embedded SYstems
Local project leader: Prof. Donatella Sciuto (POLIMI)
Role: Research Team Member
Activities: Definition and implementation of design space exploration techniques to statically support the a system-wide run-time resource manager on a many-core architecture (ST-P2012/STHORM)

FP7-ICT-216693-MULTICUBE 
Title: MULTI-objective Design Space Exploration of MULTIprocessor SOC Architectures for Embedded MULTImedia Applications
Local project leader: Prof. Cristina Silvano (POLIMI)
Role: Co-applicant, Work-Package Leader and Deputy Project Coordinator
Activities: Coordinator of all the project activities regarding the automatic design space exploration (A-DSE) of multiprocessor architectures. Development of an A-DSE tool in terms of design of experiment modules, exploration algorithms and response surface models. He was co-applicant of the project.

Medea+-2A708-LoMoSa
Title: Low Power expertise for Mobile and multi-media System Applications
Local project leader: Prof. Mariagiovanna Sami (ALaRI-USI)
Role: Co-applicant, Task Leader and Research Team Member
Activities: Analysis and implementation of low-level security services and power-aware design tech- niques for the ST-NoC communication architecture. He was co-applicant of the project.

STM/POLIMI LPNoC2
Title: Low Power Network on Chip and Multiprocessor Platforms
Local project leader: Prof. Cristina Silvano (POLIMI)
Role: Task Leader and Research Team Member (Level of involvement: HIGH)
Activities: Analysis and optimization of the synchronization problem in NoC-based multiprocessors. Definition of power-aware policies for the on-chip interconnection.

FP6-IST-035143-hARTES:
Title: HolisticApproachtoReconfigurableReal-TimeEmbeddedSystems(IPProject)
Local project leader: Prof. Donatella Sciuto (POLIMI)
Role: Research Team Member
Activities: Design and analysis of a reconfigurable multiprocessor platform (called CERBERO) to internally validate an high-level HW-SW partitioning and mapping tool.

MIUR-FIRB-MAIS
Title: Multichannel Adaptive Information Systems
Local project leader: Prof. Barbara Pernici (POLIMI)
Role: Research Team Member
Activities: Design and implementation of power estimation (SW oriented) and optimization techniques (architecture-oriented) for the low-power LX-VLIW architectures designed by STMicroelectronics.

STM/POLIMI LPNoC
Title: Low Power Network on Chip and Embedded Architectures
Local project leader: Prof. Cristina Silvano (POLIMI)
Role: Research Team Member
Activities: Design and Implementation of an on-chip interconnection architecture for  embedded systems based on a pure NoC philosophy. Analysis of the NoC-based Hyperprocessor architecture designed by STMicroelectronics from a power/performance/programmability point of view.

Medea+-A207 – Pocket Multimedia
Title: Silicon Application Platform for Pocket Multimedia
Local project leader: Roberto Zafalon (STM)
Role: Research Team Member
Activities: Design and implementation of power estimation techniques for the ST-BUS architecture based on gate level analysis.